Securing AI Production Capacity

On October 21, during GTC Berlin, Nvidia announced several massive, multi-billion-dollar deals with supply chain partners across substrates, advanced packaging, semiconductor testing, and optical engines to expand production capacity. Aimed at overcoming severe bottlenecks restricting the current and future AI infrastructure buildouts, the deals feature commitments and production roadmaps stretching through 2028, securing capacity for Nvidia and ensuring resiliency and redundancy in its AI accelerator supply chain. Nvidia CEO Jensen Huang emphasized that capacity remains the primary constraint amid unprecedented global demand for AI supercomputing systems.

The deals cover two major AI accelerator supply chain categories: hardware interconnects and OSAT (Outsourced Semiconductor Assembly and Test). Under hardware interconnects, Nvidia is securing capacity for both substrates and co-packaged optics. Nvidia has signed deals with Ibiden, Unimicron, and Samsung Electro-Mechanics to support its production capacity expansion and reserve significant portions of that capacity. The company plans to secure 2.5x dedicated substrate capacity over the next three years and has partnered with SPIL to expand manufacturing capacity for optical engines by 15x by mid-2027.

On the OSAT side, Nvidia and Amkor are targeting a 300% increase in interposer wafer capacity by the end of 2028 through expanded advanced packaging capacity in South Korea. The company also plans to double its semiconductor testing capacity by 2027, investing $1.1 billion to reserve capacity from KYEC, the world's largest semiconductor testing company, which currently handles nearly all of Nvidia's chip testing.

Nvidia currently leads the AI chip market by a considerable margin, with its accelerators deployed across the vast majority of AI data centers globally. These agreements target critical bottlenecks in the hardware supply chain, reinforcing the company's dominant market position.

Addressing Hardware Bottlenecks

The substrate base, a specialized intermediary layer connecting tiny silicon chips to the board below, represents one of the most critical bottlenecks in the AI chip supply chain. As chipmakers package an increasing number of components onto a single board, such as Nvidia's Blackwell architecture which mounts two reticle-sized GPU dies and eight HBM3E stacks, each substrate consumes significantly more material and production capacity.

Fubon Research estimates that Nvidia will supply around 12.4 million data-center AI GPUs in 2028, up from a projected 8.2 million in 2026. Nvidia is staying ahead of this curve with a planned 2.5x capacity expansion over the next three years, led by Ibiden. Earlier this year, the company signed a deal to provide a multibillion-dollar capacity reservation advance to support Ibiden's Ono Plant in Japan.

To reach its 2.5x target, Nvidia has also brought on Samsung Electro-Mechanics as a supplier, supporting facility upgrades and new plants in Busan and Sejong. Additionally, Nvidia signed a capacity reservation agreement with Unimicron to support substrate manufacturing expansion in Taiwan, which is expected to begin providing capacity by Q2 2027 and reach full output by mid-2028.

As next-generation speeds surpass 224 Gbps per lane, traditional copper traces consume considerable power to move data across the board. To address this, the industry is moving optical engines directly into the accelerator package via co-packaged optics. Nvidia has signed a deal with Taiwanese optical engine manufacturer SPIL to expand production capacity by 1,400% by mid-2027, with plans to double it again by the end of 2028.

Packaging and Testing Expansion

Because Nvidia utilizes external fabrication partners like TSMC for logic chips, final-assembly companies like Amkor package integrated modules with substrates and protective casings. Nvidia’s deal with Amkor aims to expand interposer wafer capacity by more than 300% by the end of 2028 through advanced packaging expansions in South Korea. Amkor confirmed the deal is worth $1.3 billion, bringing Nvidia's total investment in Amkor across its Arizona and South Korea facilities to $3 billion.

Finished AI accelerator packages are subsequently shipped to KYEC for testing. Nvidia expects semiconductor testing capacity to double from calendar 2026 to 2027 through buildouts across KYEC facilities in the U.S., Taiwan, and Singapore. On October 13, Nvidia agreed to pay KYEC $1.1 billion to reserve testing capacity at a new $1.4 billion U.S. facility scheduled for high-volume production in April 2027, alongside expanding operations in Singapore.

Industry-Wide Investments

Nvidia has aggressively secured long-term supply commitments to meet anticipated demand. According to its August 2026 financial disclosures, the company had accumulated $279 billion in outstanding supply and manufacturing-capacity commitments by July 2026, which have since been supplemented by these recent agreements covering memory, substrates, advanced packaging, optical interconnects, final assembly, and testing.

Competitors are also expanding rapidly. On May 21, 2026, AMD announced over $10 billion in investments across Taiwan's semiconductor ecosystem, focusing on advanced packaging and manufacturing partnerships. Google and Amazon are likewise expanding their custom TPU and Trainium accelerator programs.

Intel is positioning its foundry and advanced packaging operations as alternatives to TSMC, expanding EMIB-T packaging technology with reports indicating Google has reserved capacity to package over three million TPUs in 2028. Intel is also advancing its 18A and 14A manufacturing processes.

Samsung is ramping up its 2nm manufacturing technology and preparing its Taylor, Texas, facility for volume production in 2027 as it invests heavily to narrow the gap with industry leader TSMC.

Meanwhile, the Terafab project—a joint semiconductor manufacturing initiative involving Tesla, SpaceX, and xAI—aims to manufacture the equivalent of one terawatt of AI computing capacity annually. Utilizing Intel's 14A fabrication technology, the project targets its first experimental chips in 2027 and high-volume production by late 2028.

While the semiconductor supply chain remains heavily constrained, major technology players continue to invest extensively to maintain the flow of hardware into data centers and neoclouds.