CoWoS Capacity Pressures
TSMC is weighing raising prices for its Chip on Wafer on Substrate advanced packaging technology by as much as 20%, according to reports citing supply chain sources. The potential increase reflects strained capacity driven by high AI demand and longer delivery times for chipmaking equipment.
CoWoS combines logic dies and high-bandwidth memory stacks within a single package to supply the data bandwidth required by AI accelerators. Building these packages has become more complex as chip designers integrate larger compute and memory components. Nvidia’s Blackwell architecture pairs two large GPU dies with eight HBM3E stacks, and upcoming Rubin chips are expected to increase integration further.
Testing and Equipment Bottlenecks
Testing has emerged as an additional bottleneck in production. Blackwell reportedly requires three to four times longer to test than previous-generation Hopper GPUs, and Rubin could demand significantly longer test cycles. These extended timelines keep equipment occupied and constrain output growth. Server CPUs and custom ASICs also compete for advanced packaging capacity.
Equipment lead times have stretched from three to six months to as long as eight months. Consequently, TSMC has reportedly placed equipment orders at existing prices rather than negotiating discounts, prioritizing timely delivery of fab tools over cost reductions.
Expanding Supply Chains
TSMC's projected semiconductor equipment requirements have expanded rapidly to meet AI demand. Executive remarks indicate that expected equipment needs reached nearly double original estimates as AI workloads accelerated.
To broaden its packaging supply chain, GlobalFoundries agreed to produce silicon interposers for TSMC’s CoWoS in the United States under a multi-year contract, with production slated to ramp up in 2028. However, interposers represent only one stage of the overall packaging process.
Broader Wafer Price Increases
Higher costs are also affecting other manufacturing areas. TSMC is reportedly considering broader price increases for 2027, with wafer prices on advanced process nodes expected to climb by 5% to 10%. Customers utilizing 2nm and 3nm-class nodes may face steeper hikes, and those requesting capacity beyond initial allocations could incur additional premiums.
Industry forecasts estimate TSMC’s monthly capacity will rise significantly as the company scales production for complex AI processors. If both packaging and wafer price adjustments take effect, hardware production costs are expected to increase across the supply chain.
